The present invention generally relates to a semiconductor package, and more specifically, to a technology of facilitating formation of a Double Die Package (DDP) with many single chips.
Due to high performance of electronic devices, various techniques for providing semiconductor modules of high capacity have been developed. In order to enhance the capacity of semiconductor modules, high integration of devices, stack-structured packaging methods, and methods for reducing the package size to mount more packages on a printing circuit board have been provided. As a result, various kinds of packages, such as Thin Small Outline Package (TSOP), Fine Pitch Ball Grid Array (FBGA), and Multi Chip Package (MCP), have been developed.
Also, due to speed-up and scale-down of the multimedia system, the component parts thereof become smaller. For example, semiconductor integrated circuits (IC) become smaller through reduction of memory chips, and several chips are mounted in one package to increase board packing efficiency.
A packaging technology has been developed to reduce a package size by mounting more packages on a limited substrate. For example, a chip scale package including a semiconductor chip which occupies 80% of the whole package has been suggested.
Chip Scale Package increases the number of mountable packages due to size reduction thereof. However, it is difficult to increase the capacity and embody a high-capacity system because a semiconductor chip is mounted in a package.
A stack package and a DDP for mounting two or more semiconductor chips in a package have been developed to increase the capacity of the package as well as to reduce the package size. Stack Package and DDP are more efficient in mounting density and mounting area than a general semiconductor package, enabling a system having a higher capacity.